#ifndef MSP430ADC12_H #define MSP430ADC12_H /* The following 2 macros define the default settings for the ADC12 control registers when used with the MSP430ADC12Basic interface (or when ADCC is used). ADC12CTL0: - multiple sample and conversion triggered by rising edge of SHI - NOTE: REFON and REF2_5V are ignored in MSP430ADCM.nc, use RefVolt component ADC12CTL1: - clock select: SMCLK - clock divider: 1 - sample-input signal not inverted - SAMPCON signal is sourced from the sampling timer (SHP=1) - sample-and-hold source: ADC12SC bit */ #define ADC12CTL0_DEFAULT 0x0000 #define ADC12CTL1_DEFAULT 0x0218 #define ASSOCIATE_ADC_CHANNEL(inputChannel, refVolt, refVoltLevel) ((((refVoltLevel << 3) + refVolt) << 4) + inputChannel) typedef struct { unsigned int inputChannel: 4; // input channel [0..15], use inputChannel_enum unsigned int referenceVoltage: 3; // reference voltage [0..7], use referenceVoltage_enum unsigned int sampleHoldTime: 4; // sample-hold-time (sample duration), use sampleHold_enum // (clock defined in ADC12CTL1_DEFAULT) unsigned int refVolt2_5: 1; // the reference generator voltage level, use refVolt2_5_enum // (ignored, if vref+ not needed for referenceVoltage) // 0 -> 1.5 V // 1 -> 2.5 V } __attribute__ ((packed)) MSP430ADC12StandardSettings_t; #define SET_ADC12_STANDARD_SETTINGS(IC, RV, SHT, RVL) \ ((MSP430ADC12StandardSettings_ut)((((((((uint16_t) RVL) << 4) + SHT) << 3) + RV) << 4) + IC)) typedef union { uint16_t i; MSP430ADC12StandardSettings_t s; } MSP430ADC12StandardSettings_ut; typedef struct { unsigned int inputChannel: 4; // input channel [0..15], use inputChannel_enum unsigned int referenceVoltage: 3; // reference voltage [0..7], use referenceVoltage_enum unsigned int sampleHoldTime: 4; // sample-hold-time (sample duration), use sampleHold_enum unsigned int clockSource: 2; // ADC12 clock source, use clockSource_enum unsigned int clockDiv: 3; // ADC12 clock divider, use clockDiv_enum unsigned int sampleHoldSource: 2; // source (timer) select for the SHI signal, use enum sampleHoldSource_enum // make sure this timer is not used by another component ! unsigned int refVolt2_5: 1; // the reference generator voltage level, use refVolt2_5_enum // (ignored, if vref+ not needed for referenceVoltage) // 0 -> 1.5 V // 1 -> 2.5 V } __attribute__ ((packed)) MSP430ADC12AdvancedSettings_t; #define SET_ADC12_ADVANCED_SETTINGS(IC, RV, SHT, CS, CD, SHS, RVL) \ ((MSP430ADC12AdvancedSettings_ut) ((((((((((((((uint32_t) RVL) << 2) + SHS) << 3) + CD) << 2) + CS) << 4) + SHT) << 3) + RV) << 4) + IC)) typedef union { uint32_t i; MSP430ADC12AdvancedSettings_t s; } MSP430ADC12AdvancedSettings_ut; typedef enum { ADC_FAIL = 0, ADC_SUCCESS = 1, ADC_QUEUED = 2 } adcResult_t; enum sampleHoldSource_enum { HOLDSOURCE_TIMERA_OUT1 = 1, // TimerA.CompareA1 HOLDSOURCE_TIMERB_OUT0 = 2, // TimerB.CompareB0 HOLDSOURCE_TIMERB_OUT1 = 3 // TimerB.CompareB1 }; enum refVolt2_5_enum { REFVOLT_LEVEL_1_5 = 0, // reference voltage of 1.5 V REFVOLT_LEVEL_2_5 = 1, // reference voltage of 2.5 V }; #define REFVOLT_LEVEL_NONE REFVOLT_LEVEL_1_5 enum clockDiv_enum { CLOCK_DIV_1 = 0, // ADC12 clock divider of 1 CLOCK_DIV_2 = 1, // ADC12 clock divider of 2 CLOCK_DIV_3 = 2, // ADC12 clock divider of 3 CLOCK_DIV_4 = 3, // ADC12 clock divider of 4 CLOCK_DIV_5 = 4, // ADC12 clock divider of 5 CLOCK_DIV_6 = 5, // ADC12 clock divider of 6 CLOCK_DIV_7 = 6, // ADC12 clock divider of 7 CLOCK_DIV_8 = 7, // ADC12 clock divider of 8 }; enum inputChannel_enum { // see device specific data sheet which pin Ax is mapped to INPUT_CHANNEL_A0 = 0, // Inputchannel A0 INPUT_CHANNEL_A1 = 1, // Inputchannel A1 INPUT_CHANNEL_A2 = 2, // Inputchannel A2 INPUT_CHANNEL_A3 = 3, // Inputchannel A3 INPUT_CHANNEL_A4 = 4, // Inputchannel A4 INPUT_CHANNEL_A5 = 5, // Inputchannel A5 INPUT_CHANNEL_A6 = 6, // Inputchannel A6 INPUT_CHANNEL_A7 = 7, // Inputchannel A7 EXTERNAL_REFERENCE_VOLTAGE = 8, // VeREF+ (input channel 8) REFERENCE_VOLTAGE_NEGATIVE_TERMINAL = 9, // VREF-/VeREF- (input channel 9) INTERNAL_TEMPERATURE = 10, // Temperature diode (input channel 10) INTERNAL_VOLTAGE = 11 // (AVcc-AVss)/2 (input channel 11-15) }; enum referenceVoltage_enum { REFERENCE_AVcc_AVss = 0, // VR+ = AVcc and VR-= AVss REFERENCE_VREFplus_AVss = 1, // VR+ = VREF+ and VR-= AVss REFERENCE_VeREFplus_AVss = 2, // VR+ = VeREF+ and VR-= AVss REFERENCE_AVcc_VREFnegterm = 4, // VR+ = AVcc and VR-= VREF-/VeREF- REFERENCE_VREFplus_VREFnegterm = 5, // VR+ = VREF+ and VR-= VREF-/VeREF- REFERENCE_VeREFplus_VREFnegterm = 6 // VR+ = VeREF+ and VR-= VREF-/VeREF- }; enum clockSource_enum { CLOCK_SOURCE_ADC12OSC = 0, // ADC12OSC CLOCK_SOURCE_ACLK = 1, // ACLK CLOCK_SOURCE_MCLK = 2, // MCLK CLOCK_SOURCE_SMCLK = 3 // SMCLK }; enum sampleHold_enum { SAMPLE_HOLD_4_CYCLES = 0, // sampling duration is 4 clock cycles SAMPLE_HOLD_8_CYCLES = 1, // ... SAMPLE_HOLD_16_CYCLES = 2, SAMPLE_HOLD_32_CYCLES = 3, SAMPLE_HOLD_64_CYCLES = 4, SAMPLE_HOLD_96_CYCLES = 5, SAMPLE_HOLD_123_CYCLES = 6, SAMPLE_HOLD_192_CYCLES = 7, SAMPLE_HOLD_256_CYCLES = 8, SAMPLE_HOLD_384_CYCLES = 9, SAMPLE_HOLD_512_CYCLES = 10, SAMPLE_HOLD_768_CYCLES = 11, SAMPLE_HOLD_1024_CYCLES = 12 }; enum { TOSH_ACTUAL_ADC_EXTERNAL_REFERENCE_VOLTAGE_PORT = ASSOCIATE_ADC_CHANNEL( EXTERNAL_REFERENCE_VOLTAGE, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5), TOSH_ACTUAL_ADC_REFERENCE_VOLTAGE_NEGATIVE_TERMINAL_PORT = ASSOCIATE_ADC_CHANNEL( REFERENCE_VOLTAGE_NEGATIVE_TERMINAL, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5), TOSH_ACTUAL_ADC_INTERNAL_TEMPERATURE_PORT = ASSOCIATE_ADC_CHANNEL( INTERNAL_TEMPERATURE, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5), TOSH_ACTUAL_ADC_INTERNAL_VOLTAGE_PORT = ASSOCIATE_ADC_CHANNEL( INTERNAL_VOLTAGE, REFERENCE_VREFplus_AVss, REFVOLT_LEVEL_1_5), }; ///////////////////////////////////////////////////// #define ADC12CTL0_BASIC_SINGLE (ADC12CTL0_DEFAULT | ADC12ON) #define ADC12CTL1_BASIC_SINGLE (ADC12CTL1_DEFAULT & ~(0x06)) #define ADC12CTL0_BASIC_SEQUENCE ((ADC12CTL0_DEFAULT | ADC12ON) | MSC) #define ADC12CTL1_BASIC_SEQUENCE (((ADC12CTL1_DEFAULT & ~(0x06)) | 0x02) | MSC) #define ADC12CTL0_ADVANCED_SINGLE_REPEAT ((ADC12CTL0_DEFAULT | ADC12ON) & ~(MSC)) #define ADC12CTL0_ADVANCED_SEQUENCE ((ADC12CTL0_DEFAULT | ADC12ON) & ~(MSC)) #define ADC12CTL0_ADVANCED_SEQUENCE_REPEAT ((ADC12CTL0_DEFAULT | ADC12ON) & ~(MSC)) typedef enum { TIMERA_OUT1 = 1, // TimerA.CompareA1 TIMERB_OUT0 = 2, // TimerB.CompareB0 TIMERB_OUT1 = 3 // TimerB.CompareB1 } MSP430ADC12Timer; typedef enum { SINGLE_CHANNEL_SINGLE_CONVERSION = 0, SEQUENCE_OF_CHANNELS = 1, REPEAT_SINGLE_CHANNEL = 2, REPEAT_SEQUENCE_OF_CHANNELS = 3, INTERNAL_CHANNEL = 4, ADVANCED_SEQUENCE_OF_CHANNELS = 5, ADVANCED_REPEAT_SINGLE_CHANNEL = 6, ADVANCED_REPEAT_SEQUENCE_OF_CHANNELS = 7, ADC_IDLE = 8 } MSP430ADC12ConversionMode_t; typedef struct { volatile unsigned inch: 4, // input channel sref: 3, // reference voltage eos: 1; // end of sequence flag } __attribute__ ((packed)) adc12memctl_t; typedef struct { adc12memctl_t memctl; unsigned int sampleHoldTime: 4; unsigned int refVolt2_5: 1; unsigned int queued: 1; unsigned int gotRefVolt: 1; } __attribute__ ((packed)) bSettings_t; typedef struct { adc12memctl_t memctl; unsigned int sampleHoldTime: 4; unsigned int refVolt2_5: 1; unsigned int gotRefVolt: 1; unsigned int clockSource: 2; unsigned int clockDiv: 3; unsigned int sampleHoldSource: 2; } __attribute__ ((packed)) aSettings_t; #endif